                  ISP Synario System 2.2 Release Notes


This unique software package supports both ispLSI and pLSI high-density
devices and low-density ispGAL and GAL devices from Lattice.  The product
consists of a fully functional Synario-Entry and Functional Simulation package
for both high- and low-density logic definition.  For ispGAL and GAL device
designs, this version of the Synario-Entry toolset directly generates the
standard JEDEC file required for device programming.  For ispLSI and pLSI
device designs, the Synario-Entry tool is tightly integrated with the
Lattice ISP Synario Fitter for 2096, 2064, 2032, 1024, and 1016 device design.

A license file and software security key are not required to enable this
package.

These release notes provide additional information for version 2.2 of the
Lattice ISP Synario System design solution and are intended as a supplement 
to the hard-copy manuals and CD-ROM documents included with the package.
The following topics are discussed:

* Installing the New Software
* Device Support
* Synario Design Attribute Restrictions in Hierarchical Designs
* Common Issues and Solutions
* Lattice Device List


Installing the New Software

You must have a 486 (or higher) PC with 50 megabytes of free disk, running
Windows 3.1, or later, to successfully install and use this software. Load the
ISP Synario Entry/Sim software and ISP Synario Fitter in succession. Once that
is completed, you can add the ISP Daisy Chain Download and ispCODE and
ispGDS software to your PDSPLUS directory.  See the Data I/O Getting Started
manual for information on installing the ISP Synario Entry/Sim software.
See the Lattice pDS+ Fitter 2.2 Installation Guide for information on
installing the ISP Synario Fitter.


Device Support

Version 2.2 of the ISP Synario System supports the following Lattice devices:

* ispLSI and pLSI2096-125LQ128, 128-pin, PQFP
* ispLSI and pLSI2096-100LQ128, 128-pin, PQFP
* ispLSI and pLSI2096-80LQ128, 128-pin, PQFP
* ispLSI and pLSI2064-125LJ84, 84-pin, PLCC
* ispLSI and pLSI2064-100LJ84, 84-pin, PLCC
* ispLSI and pLSI2064-80LJ84, 84-pin, PLCC
* ispLSI2064-125LT100, 100-pin, TQFP
* ispLSI2064-100LT100, 100-pin, TQFP
* ispLSI2064-80LT100, 100-pin, TQFP
* ispLSI and pLSI2032-150LJ44, 44-pin, PLCC
* ispLSI and pLSI2032-135LJ44, 44-pin, PLCC
* ispLSI and pLSI2032-110LJ44, 44-pin, PLCC
* ispLSI and pLSI2032-80LJ44, 44-pin, PLCC
* ispLSI and pLSI2032-150LT44, 44-pin, TQFP
* ispLSI and pLSI2032-135LT44, 44-pin, TQFP
* ispLSI and pLSI2032-110LT44, 44-pin, TQFP
* ispLSI and pLSI2032-80LT44, 44-pin, TQFP
* ispLSI and pLSI1024-90LJ68, 68-pin, PLCC
* ispLSI and pLSI1024-80LJ68, 68-pin, PLCC
* ispLSI and pLSI1024-60LJ68, 68-pin, PLCC
* ispLSI and pLSI1024-60LJ68I, 68-pin, PLCC
* ispLSI and pLSI1024-60LH68/883, 68-pin, JLCC
* ispLSI and pLSI1016-110LJ44, 44-pin, PLCC
* ispLSI and pLSI1016-90LJ44, 44-pin, PLCC
* ispLSI and pLSI1016-80LJ44, 44-pin, PLCC
* ispLSI and pLSI1016-60LJ44, 44-pin, PLCC
* ispLSI and pLSI1016-60LJ44I, 44-pin, PLCC
* ispLSI and pLSI1016-90LT44, 44-pin, TQFP
* ispLSI and pLSI1016-80LT44, 44-pin, TQFP
* ispLSI and pLSI1016-60LT44, 44-pin, TQFP
* ispLSI and pLSI1016-60LH44/883, 44-pin, JLCC
* GAL16V8
* GAL16V8Z
* GAL16LV8
* GAL16VP8
* GAL16LV8ZD
* GAL18V10
* GAL20LV8ZD
* GAL20RA10
* GAL20V8
* GAL20V8Z
* GAL20VP8
* GAL20XV10
* GAL22LV10
* GAL22V10
* ispGAL22V10
* GAL26CV12
* GAL6001
* GAL6002

The ispGDS Compiler supports the following Lattice ispGDS devices:

* ispGDS14
* ispGDS18
* ispGDS22


Synario Design Attribute Restrictions in Hierarchical Designs

The current version of Synario by Data I/O does not properly process Lattice
Design Attributes in the lower-level modules of hierarchical designs. We
strongly recommend that you place Lattice Design Attributes and Fitter Control
Options in the top-level of your design. See the pDS+ Synario/ABEL Design
and Simulation Environment User Manual for further details.


Common Issues and Solutions

Issue:  If you use a dot extension in a pLSI property statement, a warning
        message appears which states that "Signals in pins or nodes cannot
        have dot extensions." This restriction is imposed by Data I/O Synario.
        An example of a dot extension in a pLSI property statement is shown
        below.

              pLSI property `PRESERVE QB0.Q';

Solution:  Manually edit the design.abl file to remove the dot extension and
           attach the attribute to the pin or node itself. To preserve the
           data, clock, or reset input of a register, you must define an
           intermediate node and preserve it. An example of an edited pLSI
           property statement is shown below:

                pLSI property `PRESERVE QB0';


Lattice Device List

The Device Numbers listed in the following tables are the device part
numbers you enter when using the ISP Synario System software. It is
important that you keep this list as a reference when using the ISP Synario
System software. Refer to the Lattice Data Book 1994 for the part numbers to
order devices.


1000 Family Device Numbers

Device Number          Speed     Package     Pins     Grade

ispLSI 1000 Device Family

ispLSI1024-90LJ68      90 MHz    PLCC        68       Commercial

ispLSI1024-80LJ68      80 MHz    PLCC        68       Commercial

ispLSI1024-60LJ68      60 MHz    PLCC        68       Commercial

ispLSI1024-60LJ68I     60 MHz    PLCC        68       Industrial

ispLSI1024-60LH68/883  60 MHz    JLCC        68       Military/SMD

ispLSI1016-110LJ44    110 MHz    PLCC        44       Commercial

ispLSI1016-90LJ44      90 MHz    PLCC        44       Commercial

ispLSI1016-80LJ44      80 MHz    PLCC        44       Commercial

ispLSI1016-60LJ44      60 MHz    PLCC        44       Commercial

ispLSI1016-60LJ44I     60 MHz    PLCC        44       Industrial

ispLSI1016-90LT44      90 MHz    TQFP        44       Commercial

ispLSI1016-80LT44      80 MHz    TQFP        44       Commercial

ispLSI1016-60LT44      60 MHz    TQFP        44       Commercial

ispLSI1016-60LH44/883  60 MHz    JLCC        44       Military/SMD


pLSI 1000 Device Family

pLSI1024-90LJ68        90 MHz    PLCC        68       Commercial

pLSI1024-80LJ68        80 MHz    PLCC        68       Commercial

pLSI1024-60LJ68        60 MHz    PLCC        68       Commercial

pLSI1024-60LJ68I       60 MHz    PLCC        68       Industrial

pLSI1024-60LH68/883    60 MHz    JLCC        68       Military/SMD

pLSI1016-110LJ44      110 MHz    PLCC        44       Commercial

pLSI1016-90LJ44        90 MHz    PLCC        44       Commercial

pLSI1016-80LJ44        80 MHz    PLCC        44       Commercial

pLSI1016-60LJ44        60 MHz    PLCC        44       Commercial

pLSI1016-60LJ44I       60 MHz    PLCC        44       Industrial

pLSI1016-90LT44        90 MHz    TQFP        44       Commercial

pLSI1016-80LT44        80 MHz    TQFP        44       Commercial

pLSI1016-60LT44        60 MHz    TQFP        44       Commercial

pLSI1016-60LH44/883    60 MHz    JLCC        44       Military/SMD


2000 Family Device Numbers

Device Number          Speed     Package     Pins     Grade

ispLSI 2000 Device Family

ispLSI2096-125LQ128    125 MHz   PQFP        128      Commercial

ispLSI2096-100LQ128    100 MHz   PQFP        128      Commercial

ispLSI2096-80LQ128      80 MHz   PQFP        128      Commercial

ispLSI2064-125LJ84     125 MHz   PLCC         84      Commercial

ispLSI2064-100LJ84     100 MHz   PLCC         84      Commercial

ispLSI2064-80LJ84       80 MHz   PLCC         84      Commercial

ispLSI2064-125LT100    125 MHz   TQFP        100      Commercial

ispLSI2064-100LT100    100 MHz   TQFP        100      Commercial

ispLSI2064-80LT100      80 MHz   TQFP        100      Commercial

ispLSI2032-150LJ44     150 MHz   PLCC         44      Commercial

ispLSI2032-135LJ44     135 MHz   PLCC         44      Commercial

ispLSI2032-110LJ44     110 MHz   PLCC         44      Commercial

ispLSI2032-80LJ44       80 MHz   PLCC         44      Commercial

ispLSI2032-150LT44     150 MHz   TQFP         44      Commercial

ispLSI2032-135LT44     135 MHz   TQFP         44      Commercial

ispLSI2032-110LT44     110 MHz   TQFP         44      Commercial

ispLSI2032-80LT44       80 MHz   TQFP         44      Commercial


pLSI 2000 Device Family

pLSI2096-125LQ128      125 MHz   PQFP        128      Commercial

pLSI2096-100LQ128      100 MHz   PQFP        128      Commercial

pLSI2096-80LQ128        80 MHz   PQFP        128      Commercial

pLSI2064-125LJ84       125 MHz   PLCC         84      Commercial

pLSI2064-100LJ84       100 MHz   PLCC         84      Commercial

pLSI2064-80LJ84         80 MHz   PLCC         84      Commercial

pLSI2032-150LJ44       150 MHz   PLCC         44      Commercial

pLSI2032-135LJ44       135 MHz   PLCC         44      Commercial

pLSI2032-110LJ44       110 MHz   PLCC         44      Commercial

pLSI2032-80LJ44         80 MHz   PLCC         44      Commercial

pLSI2032-150LT44       150 MHz   TQFP         44      Commercial

pLSI2032-135LT44       135 MHz   TQFP         44      Commercial

pLSI2032-110LT44       110 MHz   TQFP         44      Commercial

pLSI2032-80LT44         80 MHz   TQFP         44      Commercial

